JFET Follower Amplifier Cancels Distortion

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mediatechnology
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JFET Follower Amplifier Cancels Distortion

Post by mediatechnology » Tue Aug 14, 2012 2:16 pm

The figures for this article have disappeared from the Electronic Design archive leaving only the text. I've reconstructed the original article and its figures for posterity. Thank you Dimitri for all of your work. I didn't want this one to disappear. Wayne, November 2018.

"JFET Follower Amplifier Cancels Distortion," Dimitri Danyuk, Electronic Design, August 3, 2012.

Many improvements to the follower circuit have been proposed over the years. The White cathode follower doubles the output current and makes the transfer function more linear. (1) Adding a common-base amplifying stage (current follower) significantly improved the White follower’s power-supply rejection ratio. (2)

Pioneer Electronic Corp. engineers took the next step by applying the White follower to a pair of followers connected in series. The premise of the Pioneer Super Linear Circuit (SLC) is that the nonlinear transfer function of the first transistor is canceled by the inverse nonlinearity of the second transistor in series. (3)

Figure 1 presents another improvement, a JFET follower with distortion compensation. Transistor Q1’s source voltage reproduces the input voltage and then drives Q3’s base. Both Q1 and Q3 supply current in the load, RL. Because of the current mirror (Q2-Q4), Q1’s source current is equal to Q3’s collector current. The sum of Q1’s source current and Q4’s collector current is: (VIn – VGS + VBE)/RL

Image
Figure 1. A JFET follower circuit with a current mirror made up of Q2 and Q4 provides distortion cancellation based on the value selected for RS.

Because Q3 has a finite transconductance, its emitter current (or load current) will modulate its base-emitter voltage. The gate-source voltage of Q1 can be modulated in the same way by adding resistor RS to the SLC. At a certain value of RS, modulation in VBE will be cancelled by the same modulation in VGS. A similar distortion-cancellation mechanism occurs in a single-FET, common-source amplifying stage. (4)

Figure 2 shows the measured total harmonic distortion plus noise (THD+N) for this circuit for three values of RL as RS is varied. The improvement is quite remarkable, with distortion for 1 V rms below 103 dB.

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Figure 2. For the three loads used in these measurements and at 1 V rms, THD+N is below 103 dB at the optimum RS.

For the three loads used in these measurements and at 1 V rms, THD+N is below 103 dB at the optimum RS.

Another way to control the circuit’s balance condition is to change the current mirror’s transfer ratio. Figure 3 illustrates how the THD+N versus RS curves are shifted for a different ratio of R3/R4. In this case, Q1’s source current is a portion of Q3’s emitter current. This can be helpful when Q1’s quiescent current is determined by other design objectives—for example, noise performance.

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Figure 3. If the ratio of R3/R4 is changed, the required value of RS changes also.

Because of regenerative feedback, the capacitive load of Q3’s emitter will lead to high-frequency peaking inside the loop. So the load capacitance is isolated with R5, and some kind of frequency compensation (C1) might be needed. R6 = 100 kΩ represents the system input resistance.

The linear relationship between the voltage across RL and the input means there is a linear relationship between the output current and input signal. So, the circuit of Figure 1 can be rearranged in the form of amplifier with a linear transfer function (Fig. 4).

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Figure 4. Because of the linear relationship of the output current and input signal created by the circuit, it can be rearranged in the form of an amplifier with a linear transfer function.

The author would like to thank Louis Vlemincq and Scott Wurcer for their discussions.

References
(1) White, E.L.C., “Thermionic Valve Amplifier Circuit Arrangements,” U.S. patent 2358428, Sept. 19, 1944.
(2) Taylor, P.L., “Audio Power Amplifier,” Wireless World, June 1973, p. 301.
(3) Ozawa, O., and Ishikawa, K., “Super Linear Circuit,” 60th AES Convention, May 1980, Preprint No. 1660, pp 1-38.
(4) Designing With Field-Effect Transistors, ed. by A.D. Evans, McGraw-Hill, New York, 1981, Ch. 3-11, “Distortion in FET Amplifiers.”


I'm starting to see more of Dimitri's work lately. See also:

https://www.electronicdesign.com/power/ ... distortion

https://www.electronicdesign.com/analog ... p-circuits

Dimitri's website: http://www.angelfire.com/az3/dimitri/

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Re: JFET Follower Amplifier Cancels Distortion

Post by emrr » Thu Aug 16, 2012 11:06 am

Interesting, thanks. Some day I'll learn enough to know something.
Best,

Doug Williams
Electromagnetic Radiation Recorders

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mediatechnology
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Re: JFET Follower Amplifier Cancels Distortion

Post by mediatechnology » Sun Aug 19, 2012 8:29 am

Thanks Doug.

I just glanced at this circuit while reaching for something else and it struck me: "Could the use of a current mirror linearize a FET acting as a shunt attenuator?"

I realize the topology above is not correct and that techniques providing feedback from the source to the gate to reduce distortion have been around for ages. I don't ever recall seeing one using a current mirror.

When I get the time I want to try this little circuit and then see if it can do other things.

It seems like it might also be a good way to linearize a condenser Mic impedance converter.

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Re: JFET Follower Amplifier Cancels Distortion

Post by ricardo » Sun Aug 19, 2012 7:36 pm

mediatechnology wrote:It seems like it might also be a good way to linearize a condenser Mic impedance converter.
This phenomena is already used by Schoeps in their ubiquitous FET phase splitter. Scott Wurcer discusses and shows results in his Linear Audio series of articles.

There is an optimum FET current for this topology (dependent on loadsa factors) and distortion shows a sharp dip. Fortunately, this is close to optimum bias for maximum 'undistorted' output with the usual component values & voltages. Official Schoeps alignment procedure specifies twiddling the FET bias using a distortion meter.

JR would say, "there's more than one way to skin a cat."

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Re: JFET Follower Amplifier Cancels Distortion

Post by mediatechnology » Mon Aug 20, 2012 5:24 am

This phenomena is already used by Schoeps in their ubiquitous FET phase splitter.
Thanks ricardo. That's exactly the stage I was thinking of. This is the one?

Image

I see the 1G gate bias ressistor "sees" an adjustable portion of the source current.
I suppose active linearization would introduce too much noise.

Perhaps Dimitri's circuit might have some use to linearize a JFET shunt VCA.
I know passive source to gate feedback is quite common in JFET shunt voltage controlled resistor circuits.

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Re: JFET Follower Amplifier Cancels Distortion

Post by JR. » Fri Aug 24, 2012 12:33 pm

Thanks for posting this... Interesting, but as far as I can see this IS NOT the same mechanism as the phase splitter schemo also posted.

The latter example uses the well known JFET mechanism where a fraction of the source voltage (usually 1/2 or -6dB) is introduced back into the gate voltage to create a first order reduction in distortion. I have used this several times over the years and it works, while I don't know that -100dB THD performance is possible with it.

The new article looks like a completely different mechanism playing games with precisely mirrored operating currents to reduce transistor Vbe nonlinearity somehow in combination with Vgs, while I would expect these to behave more like apples and oranges, unless the gate diode is forward biased on, which I doubt that is. So I don't understand his circuit well enough to use more broadly.

The article further suggests a pretty narrow cancelation window for fixed known load impedances, so perhaps this is useful for some dedicated front end, followed by another buffer.

If I was still messing with my phono preamps I might be tempted to see how this would work as a low noise high Z JFET front end. While the phono preamp application needs a bunch of voltage gain, so not as drawn.

JR

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Re: JFET Follower Amplifier Cancels Distortion

Post by mediatechnology » Fri Aug 24, 2012 12:43 pm

John - It didn't look like anything I'd seen before either.

I'm wondering that by rearranging some of the ports it could be made to linearize a JFET voltage controlled resistor.

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Re: JFET Follower Amplifier Cancels Distortion

Post by JR. » Fri Aug 24, 2012 1:40 pm

I don't know...

One very low distortion "linearized" JFET shunt example is in the gain leg of the AGC for the low distortion sine wave generator published by Robert Cordell in his Audio Magazine distortion analyzer article. He did some clever stuff in how he extracted a buffered source voltage to add back into the gate control voltage.

viewtopic.php?f=12&t=526

JR

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Re: JFET Follower Amplifier Cancels Distortion

Post by ricardo » Sat Aug 25, 2012 5:17 am

JR. wrote:Thanks for posting this... Interesting, but as far as I can see this IS NOT the same mechanism as the phase splitter schemo also posted.

The latter example uses the well known JFET mechanism where a fraction of the source voltage (usually 1/2 or -6dB) is introduced back into the gate voltage to create a first order reduction in distortion.
The Schoeps doesn't actually feed anything back to the gate except at very LF & DC.

It cancels 2nd in a single device, the FET, by combining a push pull signal at a specific current. The dip in THD is not as sharp as the article and certainly not -100dB. Only about 0.5% near overload. But no extra devices required.
I have used this several times over the years and it works, while I don't know that -100dB THD performance is possible with it
The 'half' Vds fed to gate trick was used a lot by Ray Dolby to linearise FET voltage controlled 'resistors'
The new article looks like a completely different mechanism playing games with precisely mirrored operating currents to reduce transistor Vbe nonlinearity somehow in combination with Vgs, while I would expect these to behave more like apples and oranges, unless the gate diode is forward biased on, which I doubt that is.
Yes. I suppose this beach bum is less pedantic than yus guys. To me its another 'tweak FET current and add for THD' scheme.

But my first thought was, with that complexity, you might as well couple the FET to an OPA and apply feedback around the whole shebang. Easy to get -100dB THD without tweaking and only 2 devices. Did this with the Soundfield Mk4 though motive was to preserve the FET as the main electronic noise source rather than THD.

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Re: JFET Follower Amplifier Cancels Distortion

Post by mediatechnology » Sat Aug 25, 2012 7:55 am

The 'half' Vds fed to gate trick was used a lot by Ray Dolby to linearise FET voltage controlled 'resistors'
I looked and that's what Cordell did in the THD analyser. IIRC I've seen the half Vds in the 1176 FET shunt attenuator.

The THD reduction "notches" are quite narrow in Dimitri's design. I still think this would be a fun circuit to play with.

ricardo - What is the typical value of R5 and R6 in the Schoep's circuit? Are those AOT?

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